Fault tolerant flip-flop design for ultra-low power subthreshold logic
Abstract
Low power consumption and radiation hardness are generally competing requirements for space electronics as well as many earth-bound high reliability applications. Recently, subthreshold logic has emerged as a technology that can deliver the theoretical minimum energy per computation by running at ultra-low levels. The resulting performance degradation is tolerable due the dramatic increase in energy efficiency. However, operating circuits at such low voltages decreases the critical charge---Qcrit---required to corrupt the contents of memories and sequential elements. The marriage of subthreshold logic and high-reliability electronics is inevitable, yet there has been to date no investigation of the effects of radiation on circuits that operate at such low voltages. This thesis provides a comprehensive comparison of a variety of traditional flip-flop designs at subthreshold levels---not just in terms of performance, power and area but radiation hardness as well. Furthermore, a novel flip-flop design is presented, which is optimized for robust subthreshold operation.
Subject Area
Electrical engineering
Recommended Citation
Dukle, Gaurav Avadhut, "Fault tolerant flip-flop design for ultra-low power subthreshold logic" (2007). ETD Collection for University of Texas, El Paso. AAI1444081.
https://scholarworks.utep.edu/dissertations/AAI1444081