Three-dimensional electronics packaging integration of stereolithography and direct print

Misael Navarrete, University of Texas at El Paso


Traditional placement of electrical components has been constrained to two dimensions and two and half dimensions for routing by vertical vias using traditional printed circuit board manufacturing technology. The consumer demand for miniaturization of electronic circuits with increased functionality is becoming increasing difficult. The current size reduction in CMOS technology has almost reached its potential. Continued size reduction may introduce new forms of transistor, which can affect the performance of electronics. At the device level, system in package (SiP) offers the ability to vertically stack die that are connected by wire bonds. SiP is limited to only die and does not offer complete system miniaturization. To achieve full system integration packaging, new technologies need to be developed that enable an additional dimension of design space to increase the ability to place components and routing in three dimensional off. Solid freeform provides the ability to manufacture complex 3D structures that that are suitable to house electronics. Direct print is a technology that has the ability to dispense material on non-conformal surfaces. Direct print can be integrated with stereolithography to dispense conductive inks or epoxies into channels manufactured by stereolithography to fabricate 3D electronics. This research describes the integration of stereolithography and direct print to demonstrate the capabilities of embedded 3D electronics with off-axis components and routing to provide new levels of design freedom that off a complete system miniaturization for the implementation of electronics systems. ^

Subject Area

Engineering, Packaging

Recommended Citation

Navarrete, Misael, "Three-dimensional electronics packaging integration of stereolithography and direct print" (2009). ETD Collection for University of Texas, El Paso. AAI1465262.