A multiresolution high-speed pyramid algorithm: Compression, generalization, performance analysis, and hardware
The High-Speed Pyramid (HSP) transform of Sahinoglou and Cabrera is adapted and applied in various ways to arrive at different image compression approaches. Theoretical results as well as hardware and software structures are obtained. The key advantages of this family of algorithms are their low degree of computational complexity and their straightforward hardware implementation, in most cases. Along with the HSP transform, a complementary lossless binary data compression algorithm, called Logical Zerotree (LZT) and which maintains the simplicity of the general structure, is analyzed.^ Starting from the triangular wavelet expansion point of view, the HSP is first related to nonrecursive and recursive implementations of multi-scale representations for 1-D and 2-D signals leading naturally to a pyramid transform structure.^ The critically sampled HSP transform of an image followed by entropy coding algorithms such as Huffman, Arithmetic, and their adaptive versions, are proposed as lossless image compression algorithms. The compression rates are found to be good compared to other lossless pyramid algorithms. The addition of a quantization scheme to the HSP transform allows us to build a set of lossy image compression schemes. We analyze the use of the LZT with the HSP which gives the HSP-LZT compression scheme. Extending quantization to blocks of HSP coefficients, Vector Quantization (VQ) schemes are formulated in detail and are compared to the HSP-LZT. These HSP-VQ approaches do not produce the blockiness that is inherent in direct VQ coding. We obtain better compression rates than HSP-LZT in the lowest range of bitrates.^ The 1-D HSP transform pyramid structure is analyzed in detail as a 1-D multirate system. The structure is converted to an equivalent biorthogonal 2-channel perfect reconstruction filter bank structure, with a reduced number of operations. Generalizations for the filter properties are presented. Various structures are derived using multidimensional multirate operations in the rectangular and quincunx domains to implement the 2-D HSP.^ Finally, the HSP transform implemented as a hardware VLSI chip for block-by-block image compression is presented. Some interesting features include: modularity to grow to a larger processing block, multiplierless computations, concurrent loading and unloading, quantization, zerotree flag generation, etc. ^
Engineering, Electronics and Electrical
Vega-Pineda, Javier, "A multiresolution high-speed pyramid algorithm: Compression, generalization, performance analysis, and hardware" (1997). ETD Collection for University of Texas, El Paso. AAI9819587.