Design and simulation of bit-serial floating point arithmetic co-processor

Vijayashree Thirumalaiswamy, University of Texas at El Paso

Abstract

Abstract not available

Subject Area

Computer science

Recommended Citation

Thirumalaiswamy, Vijayashree, "Design and simulation of bit-serial floating point arithmetic co-processor" (1992). ETD Collection for University of Texas, El Paso. AAIEP04200.
https://scholarworks.utep.edu/dissertations/AAIEP04200

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